{"id":10353,"date":"2026-10-23T12:50:43","date_gmt":"2026-10-23T12:50:43","guid":{"rendered":"https:\/\/inskill.in\/training\/?p=10353"},"modified":"2026-10-23T12:53:29","modified_gmt":"2026-10-23T12:53:29","slug":"systemverilog-constraint-coding-problems-verification-interviews","status":"publish","type":"post","link":"https:\/\/inskill.in\/training\/vlsi\/systemverilog-constraint-coding-problems-verification-interviews\/","title":{"rendered":"SystemVerilog Constraint Coding Problems for Verification Interviews"},"content":{"rendered":"\t\t<div data-elementor-type=\"wp-post\" data-elementor-id=\"10353\" class=\"elementor elementor-10353\">\n\t\t\t\t\t\t<section class=\"elementor-section elementor-top-section elementor-element elementor-element-e7f72ae elementor-section-boxed elementor-section-height-default elementor-section-height-default wpr-particle-no wpr-jarallax-no wpr-parallax-no wpr-sticky-section-no wpr-column-slider-no wpr-equal-height-no\" data-id=\"e7f72ae\" data-element_type=\"section\" data-e-type=\"section\">\n\t\t\t\t\t\t<div class=\"elementor-container elementor-column-gap-default\">\n\t\t\t\t\t<div class=\"elementor-column elementor-col-100 elementor-top-column elementor-element elementor-element-4f31e64\" data-id=\"4f31e64\" data-element_type=\"column\" data-e-type=\"column\">\n\t\t\t<div class=\"elementor-widget-wrap elementor-element-populated\">\n\t\t\t\t\t\t<div class=\"elementor-element elementor-element-7678a3f elementor-widget elementor-widget-text-editor\" data-id=\"7678a3f\" data-element_type=\"widget\" data-e-type=\"widget\" data-widget_type=\"text-editor.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t\t\t<p><span style=\"font-weight: 400;\">SystemVerilog constraints are an important part of functional verification because they allow engineers to generate legal, varied stimulus without manually specifying every transaction. In verification interviews, candidates are often asked to write a constraint for a packet, generate unique array values, control random distributions, or identify why <\/span><span style=\"font-weight: 400;\">randomize()<\/span><span style=\"font-weight: 400;\"> fails.<\/span><\/p><p><span style=\"font-weight: 400;\">Interviewers are evaluating more than syntax. They want to know whether you can translate a specification into mathematical conditions, understand how constraints interact, and debug cases where the solver cannot find a valid solution.<\/span><\/p><p><span style=\"font-weight: 400;\">This guide covers practical <\/span><b>SystemVerilog constraint coding problems for verification interviews<\/b><span style=\"font-weight: 400;\">, with examples, explanations, and common mistakes. The examples use class-based randomization, which is commonly used to generate transactions in <\/span><a href=\"https:\/\/inskill.in\/training\/vlsi\/top-systemverilog-coding-questions-vlsi-interviews\"><span style=\"font-weight: 400;\">SystemVerilog<\/span><\/a><span style=\"font-weight: 400;\"> testbenches.<\/span><\/p><h3><span style=\"font-weight: 400;\">Generate a Random Number Within a Range<\/span><\/h3><p><b>Interview problem:<\/b><span style=\"font-weight: 400;\"> Write a constraint that generates an 8-bit address between 32 and 127, inclusive.<\/span><\/p><p><span style=\"font-weight: 400;\">class address_item;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand bit [7:0] addr;<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint addr_range_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0addr inside {[8&#8217;d32:8&#8217;d127]};<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p><span style=\"font-weight: 400;\">endclass<\/span><\/p><p><b>Explanation:<\/b><span style=\"font-weight: 400;\"> The <\/span><span style=\"font-weight: 400;\">inside<\/span><span style=\"font-weight: 400;\"> operator restricts <\/span><span style=\"font-weight: 400;\">addr<\/span><span style=\"font-weight: 400;\"> to the specified inclusive range. Because <\/span><span style=\"font-weight: 400;\">addr<\/span><span style=\"font-weight: 400;\"> is an 8-bit unsigned variable, its normal representable values are 0 through 255, but the constraint narrows the legal set to 32 through 127.<\/span><\/p><p><span style=\"font-weight: 400;\">To test the constraint:<\/span><\/p><p><span style=\"font-weight: 400;\">address_item item = new();<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">repeat (10) begin<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0if (!item.randomize())<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0$error(&#8220;Randomization failed&#8221;);<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0else<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0$display(&#8220;Address = %0d&#8221;, item.addr);<\/span><\/p><p><span style=\"font-weight: 400;\">end<\/span><\/p><p><span style=\"font-weight: 400;\">The example checks the return value of <\/span><span style=\"font-weight: 400;\">randomize()<\/span><span style=\"font-weight: 400;\"> rather than assuming every call succeeds.<\/span><\/p><p><b>Follow-up question:<\/b><span style=\"font-weight: 400;\"> How would you allow only even addresses in the same range? Add <\/span><span style=\"font-weight: 400;\">addr[0] == 1&#8217;b0;<\/span><span style=\"font-weight: 400;\"> to the constraint block. The least significant bit of an even unsigned integer is zero.<\/span><\/p><h3><span style=\"font-weight: 400;\">Generate Only Even or Odd Random Numbers<\/span><\/h3><p><b>Interview problem:<\/b><span style=\"font-weight: 400;\"> Generate a random 8-bit number that is always even.<\/span><\/p><p><span style=\"font-weight: 400;\">class number_item;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand bit [7:0] value;<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint even_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0value[0] == 1&#8217;b0;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p><span style=\"font-weight: 400;\">endclass<\/span><\/p><p><span style=\"font-weight: 400;\">For odd values, change the condition to:<\/span><\/p><p><span style=\"font-weight: 400;\">constraint odd_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0value[0] == 1&#8217;b1;<\/span><\/p><p><span style=\"font-weight: 400;\">}<\/span><\/p><p><b>Why this works:<\/b><span style=\"font-weight: 400;\"> In binary representation, the least significant bit determines whether an unsigned integer is even or odd. An even number ends in zero, while an odd number ends in one.<\/span><\/p><p><b>Practical use:<\/b><span style=\"font-weight: 400;\"> This type of constraint can model aligned addresses, where a bus or memory protocol requires addresses to be aligned to a particular boundary.<\/span><\/p><p><span style=\"font-weight: 400;\">For example, a four-byte-aligned address must have its two least significant bits equal to zero:<\/span><\/p><p><span style=\"font-weight: 400;\">constraint align_4_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0addr[1:0] == 2&#8217;b00;<\/span><\/p><p><span style=\"font-weight: 400;\">}<\/span><\/p><p><span style=\"font-weight: 400;\">Make sure the alignment condition matches the actual protocol specification. Not every interface requires the same alignment.<\/span><\/p><h3><span style=\"font-weight: 400;\">Generate Unique Values in an Array<\/span><\/h3><p><b>Interview problem:<\/b><span style=\"font-weight: 400;\"> Generate four distinct random values, each between 1 and 15.<\/span><\/p><p><span style=\"font-weight: 400;\">class unique_array_item;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand bit [3:0] data[4];<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint data_range_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0foreach (data[i])<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0data[i] inside {[1:15]};<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint data_unique_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0unique {data};<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p><span style=\"font-weight: 400;\">endclass<\/span><\/p><p><b>Explanation:<\/b><span style=\"font-weight: 400;\"> The <\/span><span style=\"font-weight: 400;\">foreach<\/span><span style=\"font-weight: 400;\"> constraint applies the range restriction to every array element. The <\/span><span style=\"font-weight: 400;\">unique<\/span><span style=\"font-weight: 400;\"> constraint requires all listed elements to have different values.<\/span><\/p><p><span style=\"font-weight: 400;\">Since there are four elements and fifteen possible values, a solution exists.<\/span><\/p><p><b>Common mistake:<\/b><span style=\"font-weight: 400;\"> Trying to generate more unique elements than the number of legal values. For example, requiring sixteen distinct 4-bit values while excluding zero leaves only fifteen legal values, so randomization cannot satisfy the constraint.<\/span><\/p><p><span style=\"font-weight: 400;\">This problem tests whether you understand both syntax and the number of available solutions.<\/span><\/p><h3><span style=\"font-weight: 400;\">Constrain One Random Variable Based on Another<\/span><\/h3><p><b>Interview problem:<\/b><span style=\"font-weight: 400;\"> A transaction has a <\/span><span style=\"font-weight: 400;\">write<\/span><span style=\"font-weight: 400;\"> flag and an 8-bit address. Require write transactions to use addresses from <\/span><span style=\"font-weight: 400;\">0x80<\/span><span style=\"font-weight: 400;\"> to <\/span><span style=\"font-weight: 400;\">0xFF<\/span><span style=\"font-weight: 400;\">, and read transactions to use addresses from <\/span><span style=\"font-weight: 400;\">0x00<\/span><span style=\"font-weight: 400;\"> to <\/span><span style=\"font-weight: 400;\">0x7F<\/span><span style=\"font-weight: 400;\">.<\/span><\/p><p><span style=\"font-weight: 400;\">class bus_transaction;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand bit \u00a0 \u00a0 \u00a0 write;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand bit [7:0] addr;<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint addr_by_type_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0if (write)<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0addr inside {[8&#8217;h80:8&#8217;hFF]};<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0else<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0addr inside {[8&#8217;h00:8&#8217;h7F]};<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p><span style=\"font-weight: 400;\">endclass<\/span><\/p><p><b>Explanation:<\/b><span style=\"font-weight: 400;\"> The <\/span><span style=\"font-weight: 400;\">if-else<\/span><span style=\"font-weight: 400;\"> constraint expresses two mutually exclusive conditions. When <\/span><span style=\"font-weight: 400;\">write<\/span><span style=\"font-weight: 400;\"> is one, the upper half of the address range is legal. When <\/span><span style=\"font-weight: 400;\">write<\/span><span style=\"font-weight: 400;\"> is zero, the lower half is legal.<\/span><\/p><p><span style=\"font-weight: 400;\">An equivalent logical relationship can be written with implication:<\/span><\/p><p><span style=\"font-weight: 400;\">constraint addr_by_type_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0(write == 1&#8217;b1) -&gt; (addr inside {[8&#8217;h80:8&#8217;hFF]});<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0(write == 1&#8217;b0) -&gt; (addr inside {[8&#8217;h00:8&#8217;h7F]});<\/span><\/p><p><span style=\"font-weight: 400;\">}<\/span><\/p><p><b>Interview follow-up:<\/b><span style=\"font-weight: 400;\"> What if both branches accidentally restrict <\/span><span style=\"font-weight: 400;\">addr<\/span><span style=\"font-weight: 400;\"> to non-overlapping values while another constraint forces it into a third range? The combined constraints may become unsatisfiable. Always consider all active constraints together.<\/span><\/p><h3><span style=\"font-weight: 400;\">Constrain Packet Length and Payload Size<\/span><\/h3><p><b>Interview problem:<\/b><span style=\"font-weight: 400;\"> A packet has a randomized length and a payload array. Generate packets containing between 1 and 16 payload bytes, with the array size matching the length.<\/span><\/p><p><span style=\"font-weight: 400;\">class packet_item;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand bit [4:0] length;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand byte unsigned payload[];<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint length_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0length inside {[1:16]};<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0payload.size() == length;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p><span style=\"font-weight: 400;\">endclass<\/span><\/p><p><b>Explanation:<\/b><span style=\"font-weight: 400;\"> The length is limited to the range 1 through 16. The dynamic array size must equal the randomized length, so the generated transaction has a consistent number of payload bytes.<\/span><\/p><p><span style=\"font-weight: 400;\">This is a useful example because real verification environments often need relationships between transaction metadata and data structures.<\/span><\/p><p><b>Follow-up questions:<\/b><\/p><ul><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">How would you restrict the length to powers of two?<\/span><\/li><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">How would you constrain a particular header field based on the packet type?<\/span><\/li><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">What happens if another constraint requires the payload array to contain 20 elements?<\/span><\/li><\/ul><p><span style=\"font-weight: 400;\">For the first question, one option is to enumerate the legal values with <\/span><span style=\"font-weight: 400;\">inside<\/span><span style=\"font-weight: 400;\">, such as <\/span><span style=\"font-weight: 400;\">{1, 2, 4, 8, 16}<\/span><span style=\"font-weight: 400;\">. If a protocol has special length rules, encode those rules explicitly rather than assuming all packet sizes are valid.<\/span><\/p><h3><span style=\"font-weight: 400;\">Generate Values With a Weighted Distribution<\/span><\/h3><p><b>Interview problem:<\/b><span style=\"font-weight: 400;\"> Generate a two-bit transaction type where type 0 should receive weight 1, type 1 weight 3, and type 2 weight 6.<\/span><\/p><p><span style=\"font-weight: 400;\">class transaction_type_item;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand bit [1:0] kind;<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint kind_dist_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0kind inside {[0:2]};<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0kind dist {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0\u00a0\u00a00 := 1,<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0\u00a0\u00a01 := 3,<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0\u00a0\u00a02 := 6<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0};<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p><span style=\"font-weight: 400;\">endclass<\/span><\/p><p><b>Explanation:<\/b><span style=\"font-weight: 400;\"> The <\/span><span style=\"font-weight: 400;\">inside<\/span><span style=\"font-weight: 400;\"> constraint limits the legal values to 0, 1, and 2. The <\/span><span style=\"font-weight: 400;\">dist<\/span><span style=\"font-weight: 400;\"> constraint assigns relative weights to these values.<\/span><\/p><p><span style=\"font-weight: 400;\">These weights express a desired relative distribution, not a guarantee that every small batch will contain exactly 10%, 30%, and 60% of each value. Observed frequencies vary across random samples and may depend on the simulator&#8217;s constraint-solving behavior.<\/span><\/p><p><b>Interview follow-up:<\/b><span style=\"font-weight: 400;\"> What is the difference between <\/span><span style=\"font-weight: 400;\">:=<\/span><span style=\"font-weight: 400;\"> and <\/span><span style=\"font-weight: 400;\">:\/<\/span><span style=\"font-weight: 400;\"> in a distribution constraint? They specify different ways to apply weights to ranges: <\/span><span style=\"font-weight: 400;\">:=<\/span><span style=\"font-weight: 400;\"> assigns the specified weight to each value in the range, while <\/span><span style=\"font-weight: 400;\">:\/<\/span><span style=\"font-weight: 400;\"> distributes the specified weight across the range. Be careful when weighting a single value against a range containing many values.<\/span><\/p><p><span style=\"font-weight: 400;\">For a real verification plan, check the observed distribution over an adequate number of trials and use functional coverage to confirm that required scenarios are exercised.<\/span><\/p><h3><span style=\"font-weight: 400;\">Generate a Number Sequence Using an Array Constraint<\/span><\/h3><p><b>Interview problem:<\/b><span style=\"font-weight: 400;\"> Generate five 8-bit values in strictly increasing order.<\/span><\/p><p><span style=\"font-weight: 400;\">class increasing_array_item;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand bit [7:0] data[5];<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint increasing_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0foreach (data[i]) {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if (i &lt; 4)<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0data[i] &lt; data[i+1];<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0}<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p><span style=\"font-weight: 400;\">endclass<\/span><\/p><p><b>Explanation:<\/b><span style=\"font-weight: 400;\"> For every element except the last, the constraint requires the next element to be larger. The <\/span><span style=\"font-weight: 400;\">if<\/span><span style=\"font-weight: 400;\"> condition avoids accessing an element beyond the end of the array.<\/span><\/p><p><b>Follow-up question:<\/b><span style=\"font-weight: 400;\"> How would you generate a non-decreasing sequence, where equal adjacent values are allowed? Replace <\/span><span style=\"font-weight: 400;\">&lt;<\/span><span style=\"font-weight: 400;\"> with <\/span><span style=\"font-weight: 400;\">&lt;=<\/span><span style=\"font-weight: 400;\">.<\/span><\/p><p><b>Common mistake:<\/b><span style=\"font-weight: 400;\"> Writing an array constraint without checking index boundaries. Array constraints should cover the intended elements while avoiding invalid index references.<\/span><\/p><p><span style=\"font-weight: 400;\">This exercise tests array iteration, relational operators, and whether you understand how <\/span><span style=\"font-weight: 400;\">foreach<\/span><span style=\"font-weight: 400;\"> expands across the array.<\/span><\/p><h3><span style=\"font-weight: 400;\">Constrain the Sum of Array Elements<\/span><\/h3><p><b>Interview problem:<\/b><span style=\"font-weight: 400;\"> Generate four 4-bit unsigned values whose sum is exactly 20.<\/span><\/p><p><span style=\"font-weight: 400;\">class array_sum_item;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand bit [3:0] data[4];<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint sum_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0data.sum() with (int'(item)) == 20;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p><span style=\"font-weight: 400;\">endclass<\/span><\/p><p><b>Explanation:<\/b><span style=\"font-weight: 400;\"> The array reduction method <\/span><span style=\"font-weight: 400;\">sum()<\/span><span style=\"font-weight: 400;\"> adds the elements. The <\/span><span style=\"font-weight: 400;\">with<\/span><span style=\"font-weight: 400;\"> clause casts each element to an integer before summation, avoiding a narrow intermediate element type from unintentionally limiting the arithmetic result.<\/span><\/p><p><span style=\"font-weight: 400;\">Each element can range from 0 to 15, so a sum of 20 is possible.<\/span><\/p><p><b>Follow-up question:<\/b><span style=\"font-weight: 400;\"> Can the sum be 100? No. The maximum sum is (4 \\times 15 = 60), so a sum of 100 would be impossible for this array.<\/span><\/p><p><span style=\"font-weight: 400;\">This is a good interview problem because you must check whether the requested sum is feasible before blaming the solver.<\/span><\/p><h3><span style=\"font-weight: 400;\">Control a Variable&#8217;s Distribution With <\/span><span style=\"font-weight: 400;\">solve before<\/span><\/h3><p><b>Interview problem:<\/b><span style=\"font-weight: 400;\"> A one-bit <\/span><span style=\"font-weight: 400;\">mode<\/span><span style=\"font-weight: 400;\"> selects between two address ranges. How can you influence the distribution of the mode values when one branch allows many more address values than the other?<\/span><\/p><p><span style=\"font-weight: 400;\">class mode_item;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand bit \u00a0 \u00a0 \u00a0 mode;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand bit [7:0] addr;<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint mode_addr_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0if (mode == 1&#8217;b0)<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0addr inside {[8&#8217;h00:8&#8217;h03]};<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0else<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0addr inside {[8&#8217;h00:8&#8217;hFF]};<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint mode_order_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0solve mode before addr;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p><span style=\"font-weight: 400;\">endclass<\/span><\/p><p><b>Explanation:<\/b><span style=\"font-weight: 400;\"> The constraint <\/span><span style=\"font-weight: 400;\">solve mode before addr<\/span><span style=\"font-weight: 400;\"> affects how the solver distributes solutions across the variables. Here, mode zero has only four legal addresses, while mode one has 256. Without considering solution distribution, it is easy to assume the mode values will appear equally often when they may not.<\/span><\/p><p><span style=\"font-weight: 400;\">The ordering constraint can help make the distribution of <\/span><span style=\"font-weight: 400;\">mode<\/span><span style=\"font-weight: 400;\"> more representative of its own legal choices before resolving the dependent address. It does not change which combinations are legal, and it does not replace the need to check observed frequencies.<\/span><\/p><p><b>Interview tip:<\/b><span style=\"font-weight: 400;\"> Explain the difference between <\/span><i><span style=\"font-weight: 400;\">legality<\/span><\/i><span style=\"font-weight: 400;\"> and <\/span><i><span style=\"font-weight: 400;\">distribution<\/span><\/i><span style=\"font-weight: 400;\">. Constraints determine which combinations are permitted; distribution controls influence how frequently legal choices are selected. <\/span><span style=\"font-weight: 400;\">solve before<\/span><span style=\"font-weight: 400;\"> is not a procedural assignment sequence.<\/span><\/p><h3><span style=\"font-weight: 400;\">Debug a Randomization Failure<\/span><\/h3><p><b>Interview problem:<\/b><span style=\"font-weight: 400;\"> Find why this class cannot randomize successfully.<\/span><\/p><p><span style=\"font-weight: 400;\">class bad_item;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand bit [7:0] value;<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint c1 {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0value inside {[0:10]};<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint c2 {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0value &gt; 20;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p><span style=\"font-weight: 400;\">endclass<\/span><\/p><p><span style=\"font-weight: 400;\">The first constraint requires a value from 0 through 10, while the second requires a value greater than 20. No value satisfies both conditions.<\/span><\/p><p><span style=\"font-weight: 400;\">A safe way to detect the problem is:<\/span><\/p><p><span style=\"font-weight: 400;\">bad_item item = new();<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">if (!item.randomize())<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0$error(&#8220;No legal solution for bad_item&#8221;);<\/span><\/p><p><b>How to debug it:<\/b><\/p><ol><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">Check the return value of <\/span><span style=\"font-weight: 400;\">randomize()<\/span><span style=\"font-weight: 400;\">.<\/span><\/li><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">Review all active class constraints.<\/span><\/li><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">Check any inline constraints passed to <\/span><span style=\"font-weight: 400;\">randomize()<\/span><span style=\"font-weight: 400;\">.<\/span><\/li><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">Look for incompatible ranges, equality conditions, or array sizes.<\/span><\/li><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">Temporarily isolate constraints to identify the conflict, then restore the intended specification.<\/span><\/li><\/ol><p><span style=\"font-weight: 400;\">Do not simply disable a constraint to make randomization pass. First determine which condition is incorrect or whether the specification itself is inconsistent.<\/span><\/p><h3><span style=\"font-weight: 400;\">Use Inline Constraints for a Specific Test<\/span><\/h3><p><b>Interview problem:<\/b><span style=\"font-weight: 400;\"> A class normally generates addresses from <\/span><span style=\"font-weight: 400;\">0x00<\/span><span style=\"font-weight: 400;\"> through <\/span><span style=\"font-weight: 400;\">0xFF<\/span><span style=\"font-weight: 400;\">, but one test needs an address from <\/span><span style=\"font-weight: 400;\">0xF0<\/span><span style=\"font-weight: 400;\"> through <\/span><span style=\"font-weight: 400;\">0xFF<\/span><span style=\"font-weight: 400;\">.<\/span><\/p><p><span style=\"font-weight: 400;\">class address_generator;<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0rand bit [7:0] addr;<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0constraint default_addr_c {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0addr inside {[8&#8217;h00:8&#8217;hFF]};<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0}<\/span><\/p><p><span style=\"font-weight: 400;\">endclass<\/span><\/p><p><span style=\"font-weight: 400;\">A test can add an inline constraint:<\/span><\/p><p><span style=\"font-weight: 400;\">address_generator gen = new();<\/span><\/p><p>\u00a0<\/p><p><span style=\"font-weight: 400;\">if (!gen.randomize() with {<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0addr inside {[8&#8217;hF0:8&#8217;hFF]};<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0\u00a0\u00a0})<\/span><\/p><p><span style=\"font-weight: 400;\">\u00a0\u00a0$error(&#8220;Address randomization failed&#8221;);<\/span><\/p><p><b>Explanation:<\/b><span style=\"font-weight: 400;\"> The inline constraint applies to that randomization call. It is combined with the class&#8217;s active constraints, so the resulting address must satisfy both conditions.<\/span><\/p><p><span style=\"font-weight: 400;\">This technique is useful when a general transaction class supports many tests but an individual test needs to focus on a specific range or corner case.<\/span><\/p><p><b>Common mistake:<\/b><span style=\"font-weight: 400;\"> Assuming inline constraints override conflicting class constraints automatically. If the constraints have no common solution, randomization fails.<\/span><\/p><h3><span style=\"font-weight: 400;\">How Should You Prepare for Constraint Coding Interviews?<\/span><\/h3><p><span style=\"font-weight: 400;\">Practise writing and explaining each constraint rather than memorizing code. For every problem, ask:<\/span><\/p><ul><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">What are the legal values?<\/span><\/li><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">Which variables depend on other variables?<\/span><\/li><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">Can all the constraints be satisfied simultaneously?<\/span><\/li><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">Are the array sizes and index boundaries valid?<\/span><\/li><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">Does the specification require a particular distribution?<\/span><\/li><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">How will I detect a randomization failure?<\/span><\/li><li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400;\">How will I confirm the generated stimulus reaches the required scenarios?<\/span><\/li><\/ul><p><span style=\"font-weight: 400;\">Start with ranges and parity, then move to conditional constraints, arrays, uniqueness, distributions, and packet relationships. Finally, practise debugging contradictory constraints and explaining how constraint solving differs from procedural programming.<\/span><\/p><p><span style=\"font-weight: 400;\">For more practice, see VLSIGuru\u2019s <\/span><a href=\"https:\/\/vlsiguru.com\/blog\/uvm-interview-questions-and-answers-set-1\"><span style=\"font-weight: 400;\">UVM Interview Questions and Answers \u2014 Set 1<\/span><\/a><span style=\"font-weight: 400;\"> and <\/span><a href=\"https:\/\/vlsiguru.com\/blog\/uvm-interview-questions-and-answers-set-2\"><span style=\"font-weight: 400;\">UVM Interview Questions and Answers \u2014 Set 2<\/span><\/a><span style=\"font-weight: 400;\">. InSkill also offers<\/span> <a href=\"https:\/\/inskill.in\/training\/design-verification-interview-preparation\"><span style=\"font-weight: 400;\">Functional Verification Interview Preparation<\/span><\/a><span style=\"font-weight: 400;\">, which includes constraint theory, array randomization, pattern generation, and related verification exercises.<\/span><\/p><h4><span style=\"font-weight: 400;\">Conclusion<\/span><\/h4><p><span style=\"font-weight: 400;\">SystemVerilog constraint coding interviews test whether you can express verification requirements accurately and reason about the resulting legal solution space. Freshers should be comfortable with <\/span><span style=\"font-weight: 400;\">inside<\/span><span style=\"font-weight: 400;\">, <\/span><span style=\"font-weight: 400;\">foreach<\/span><span style=\"font-weight: 400;\">, <\/span><span style=\"font-weight: 400;\">unique<\/span><span style=\"font-weight: 400;\">, <\/span><span style=\"font-weight: 400;\">dist<\/span><span style=\"font-weight: 400;\">, conditional constraints, array reductions, inline constraints, and randomization-failure debugging.<\/span><\/p><p><span style=\"font-weight: 400;\">The strongest answers explain not only how to write a constraint, but also why it works, when it becomes unsatisfiable, and how you would verify the generated results. Practise these problems in a SystemVerilog simulator, inspect the output over multiple randomization calls, and connect each exercise to a realistic verification requirement.<\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t<\/section>\n\t\t\t\t<\/div>\n\t\t","protected":false},"excerpt":{"rendered":"<p>SystemVerilog constraints are an important part of functional verification because they allow engineers to generate legal, varied stimulus without manually specifying every transaction. In verification interviews, candidates are often asked to write a constraint for a packet, generate unique array values, control random distributions, or identify why randomize() fails. Interviewers are evaluating more than syntax. They want to know whether you can translate a specification into mathematical conditions, understand how constraints interact, and debug cases where the solver cannot find a valid solution. This guide covers practical SystemVerilog constraint coding problems for verification interviews, with examples, explanations, and common mistakes. The examples use class-based randomization, which is commonly used to generate transactions in SystemVerilog testbenches. Generate a Random Number Within a Range Interview problem: Write a constraint that generates an 8-bit address between 32 and 127, inclusive. class address_item; \u00a0\u00a0rand bit [7:0] addr; \u00a0 \u00a0\u00a0constraint addr_range_c { \u00a0\u00a0\u00a0\u00a0addr inside {[8&#8217;d32:8&#8217;d127]}; \u00a0\u00a0} endclass Explanation: The inside operator restricts addr to the specified inclusive range. Because addr is an 8-bit unsigned variable, its normal representable values are 0 through 255, but the constraint narrows the legal set to 32 through 127. To test the constraint: address_item item = new(); \u00a0 repeat (10) begin \u00a0\u00a0if (!item.randomize()) \u00a0\u00a0\u00a0\u00a0$error(&#8220;Randomization failed&#8221;); \u00a0\u00a0else \u00a0\u00a0\u00a0\u00a0$display(&#8220;Address = %0d&#8221;, item.addr); end The example checks the return value of randomize() rather than assuming every call succeeds. Follow-up question: How would you allow only even addresses in the same range? Add addr[0] == 1&#8217;b0; to the constraint block. The least significant bit of an even unsigned integer is zero. Generate Only Even or Odd Random Numbers Interview problem: Generate a random 8-bit number that is always even. class number_item; \u00a0\u00a0rand bit [7:0] value; \u00a0 \u00a0\u00a0constraint even_c { \u00a0\u00a0\u00a0\u00a0value[0] == 1&#8217;b0; \u00a0\u00a0} endclass For odd values, change the condition to: constraint odd_c { \u00a0\u00a0value[0] == 1&#8217;b1; } Why this works: In binary representation, the least significant bit determines whether an unsigned integer is even or odd. An even number ends in zero, while an odd number ends in one. Practical use: This type of constraint can model aligned addresses, where a bus or memory protocol requires addresses to be aligned to a particular boundary. For example, a four-byte-aligned address must have its two least significant bits equal to zero: constraint align_4_c { \u00a0\u00a0addr[1:0] == 2&#8217;b00; } Make sure the alignment condition matches the actual protocol specification. Not every interface requires the same alignment. Generate Unique Values in an Array Interview problem: Generate four distinct random values, each between 1 and 15. class unique_array_item; \u00a0\u00a0rand bit [3:0] data[4]; \u00a0 \u00a0\u00a0constraint data_range_c { \u00a0\u00a0\u00a0\u00a0foreach (data[i]) \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0data[i] inside {[1:15]}; \u00a0\u00a0} \u00a0 \u00a0\u00a0constraint data_unique_c { \u00a0\u00a0\u00a0\u00a0unique {data}; \u00a0\u00a0} endclass Explanation: The foreach constraint applies the range restriction to every array element. The unique constraint requires all listed elements to have different values. Since there are four elements and fifteen possible values, a solution exists. Common mistake: Trying to generate more unique elements than the number of legal values. For example, requiring sixteen distinct 4-bit values while excluding zero leaves only fifteen legal values, so randomization cannot satisfy the constraint. This problem tests whether you understand both syntax and the number of available solutions. Constrain One Random Variable Based on Another Interview problem: A transaction has a write flag and an 8-bit address. Require write transactions to use addresses from 0x80 to 0xFF, and read transactions to use addresses from 0x00 to 0x7F. class bus_transaction; \u00a0\u00a0rand bit \u00a0 \u00a0 \u00a0 write; \u00a0\u00a0rand bit [7:0] addr; \u00a0 \u00a0\u00a0constraint addr_by_type_c { \u00a0\u00a0\u00a0\u00a0if (write) \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0addr inside {[8&#8217;h80:8&#8217;hFF]}; \u00a0\u00a0\u00a0\u00a0else \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0addr inside {[8&#8217;h00:8&#8217;h7F]}; \u00a0\u00a0} endclass Explanation: The if-else constraint expresses two mutually exclusive conditions. When write is one, the upper half of the address range is legal. When write is zero, the lower half is legal. An equivalent logical relationship can be written with implication: constraint addr_by_type_c { \u00a0\u00a0(write == 1&#8217;b1) -&gt; (addr inside {[8&#8217;h80:8&#8217;hFF]}); \u00a0\u00a0(write == 1&#8217;b0) -&gt; (addr inside {[8&#8217;h00:8&#8217;h7F]}); } Interview follow-up: What if both branches accidentally restrict addr to non-overlapping values while another constraint forces it into a third range? The combined constraints may become unsatisfiable. Always consider all active constraints together. Constrain Packet Length and Payload Size Interview problem: A packet has a randomized length and a payload array. Generate packets containing between 1 and 16 payload bytes, with the array size matching the length. class packet_item; \u00a0\u00a0rand bit [4:0] length; \u00a0\u00a0rand byte unsigned payload[]; \u00a0 \u00a0\u00a0constraint length_c { \u00a0\u00a0\u00a0\u00a0length inside {[1:16]}; \u00a0\u00a0\u00a0\u00a0payload.size() == length; \u00a0\u00a0} endclass Explanation: The length is limited to the range 1 through 16. The dynamic array size must equal the randomized length, so the generated transaction has a consistent number of payload bytes. This is a useful example because real verification environments often need relationships between transaction metadata and data structures. Follow-up questions: How would you restrict the length to powers of two? How would you constrain a particular header field based on the packet type? What happens if another constraint requires the payload array to contain 20 elements? For the first question, one option is to enumerate the legal values with inside, such as {1, 2, 4, 8, 16}. If a protocol has special length rules, encode those rules explicitly rather than assuming all packet sizes are valid. Generate Values With a Weighted Distribution Interview problem: Generate a two-bit transaction type where type 0 should receive weight 1, type 1 weight 3, and type 2 weight 6. class transaction_type_item; \u00a0\u00a0rand bit [1:0] kind; \u00a0 \u00a0\u00a0constraint kind_dist_c { \u00a0\u00a0\u00a0\u00a0kind inside {[0:2]}; \u00a0\u00a0\u00a0\u00a0kind dist { \u00a0\u00a0\u00a0\u00a0\u00a0\u00a00 := 1, \u00a0\u00a0\u00a0\u00a0\u00a0\u00a01 := 3, \u00a0\u00a0\u00a0\u00a0\u00a0\u00a02 := 6 \u00a0\u00a0\u00a0\u00a0}; \u00a0\u00a0} endclass Explanation: The inside constraint limits the legal values to 0, 1, and 2. The dist constraint assigns relative weights to these values. These weights express a desired relative distribution, not a guarantee that every small batch will contain exactly 10%, 30%, and 60% of each value. Observed frequencies vary across random samples and may depend on the simulator&#8217;s constraint-solving behavior. Interview follow-up: What is the difference between := and :\/ in a distribution constraint? They specify<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_newsletter_access":"","_jetpack_dont_email_post_to_subs":false,"_jetpack_newsletter_tier_id":0,"_jetpack_memberships_contains_paywalled_content":false,"_jetpack_hide_featured_image":false,"_jetpack_featured_image_duplicate_dismissed":0,"_jetpack_feature_clip_id":0,"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_post_was_ever_published":false},"categories":[8],"tags":[],"class_list":["post-10353","post","type-post","status-publish","format-standard","hentry","category-vlsi"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v28.8 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>SystemVerilog Constraint Coding Problems for Interviews<\/title>\n<meta name=\"description\" content=\"Practise SystemVerilog constraint coding problems for verification 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