Gate Level Simulation Training

Watch Demo video

class images e
starr images ₹7000

Gate Level Simulations Training

Course Duration : 22 hours

Enroll Now

About Course

GLS is an important aspect of every SOC verification flow. GLS gives confidence on netlist and the corresponding SDF.


... GLS training is completely practical oriented course with hands on projects with exposure to the complete GLS flow. GLS course focus on teaching all the aspects of GLS from setup, test plan, frequency plans, SDF corners, and non-timing simulations. Course will also focus on various issues faced during GLS and debugging those. Course will involve hands on GLS project using complex gate level netlist.

Curriculum

+
Need for GLS?
GLS Concepts
How GLS differs from STA
GLS Testbench Setup
GLS Testplan development
GLS Frequency corners & timing modes, significance
SDF detailed overview, SDF annotation
GLS test debug & commonly faced issues
Vector Simulations, evcd, debug
GLS hands on project using a complex gate level netlist
SOC GLS debug concepts

Course videos

+
Unit 1 GLS TB Simulation Steps 00:10:18
Unit 2 Schedule and Agenda 00:04:00
Unit 3 What is GLS? 00:10:50
Unit 4 When GLS is run in ASIC flow? 00:18:31
Unit 5 Why we do GLS? 00:15:13
Unit 6 Synthesis and PnR flow 00:20:52
Unit 7 Standard delay format (SDF) 00:21:12
Unit 8 Timing basics 00:05:59
Unit 9 GLS Summary and GLS inputs 00:02:38
Unit 10 Timing violations and STA 00:16:11
Unit 11 Advanced STA concepts 00:21:30
Unit 12 How does GLS differ from STA? 00:14:42
Unit 13 GLS common terminology(PVT, Netlist, SDF annotation, ECO) 00:17:25
Unit 14 CDC, Multi cycle path, False path, 00:19:43
Unit 15 Formal and LEC checking 00:01:57
Unit 16 GLS question and answers 00:08:56
Unit 17 How GLS is run 00:20:13
Unit 18 Setting up GLS environment 00:16:22
Unit 19 Netlist 00:09:59
Unit 20 Force files 00:16:52
Unit 21 Synchonizer flops 00:13:04
Unit 22 Memory hierarchies 00:03:25
Unit 23 SDF correlation with netlist, SDF issues 00:27:44
Unit 24 How SDF is related to timing corners? 00:09:03
Unit 25 Testplan development for GLS 00:03:15
Unit 26 GLS simulations: unit delay and timing 00:12:17
Unit 27 GLS issues and debug 00:17:03
Unit 28 unit delay simulation issues 00:11:41
Unit 29 timing simulation issues 00:00:16
Unit 30 tools required for GLS 00:01:45
Unit 31 GLS flow, GLS compile, Setting up GLS environment 00:14:00
Unit 32 Dumping waveform signals 00:03:31
Unit 33 Choosing right frequency for GLS 00:02:21
Unit 34 SDF annotation issues, timing violations, how to resolve 00:09:26
Unit 35 debugging hanging test 00:03:52
Unit 36 Disabling timing checks 00:02:04
Unit 37 Debug using debussy tool 00:04:12
Unit 38 ECO, Regression, signoff 00:02:59
Unit 39 GLS important aspects, how to avoid mistakes 00:05:39
Unit 40 GLS friendly testcase coding 00:02:32
Unit 41 x prop, x-prop tracing, other generic issues 00:10:21
Unit 42 Hand instantiated cells 00:01:01
Unit 43 Memory controller GLS TB setup, Bringup 00:44:04
Unit 44 X-prop tracing (memory controller) 02:01:40
Unit 45 Memory controller unit delay simulations bringup 02:05:55
Unit 46 LEC, How GLS is related to LEC 00:07:45
Unit 47 Memory controller timing GLS debug 01:45:28
Unit 48 Memory controller timing simulation bring up 00:30:29
Unit 49 DMA controller TB overview 00:24:00
Unit 50 Memory controller timing simulation bringup 00:30:29
Unit 51 DMA controller TB overview 00:24:00
Unit 52 DMA Controller GLS Bringup 01:57:20
Unit 53 DMA controller GLS debug 02:17:20
Unit 54 Power aware GLS 00:49:12
Unit 55 DMA controller timing GLS debug 00:32:40
Unit 56 GLS Interview Question and Answers 02:53:00


Benefits of eLearning:

  • - Access to the Instructor - Ask questions to the Instructor who taught the course
  • - Available 24/7 - VLSIGuru eLearning courses are available when and where you need them
  • - Learn at Your Pace - VLSIGuru eLearning courses are self-paced, so you can proceed when you're ready

continue to register

Have an account ? Login Fast

Login to Continue

If you face any Issue Contact Administrator.