SPI Protocol and UVC Development Training

About Course

SPI Protocol training is focused on learning all the aspects of SPI including architecture, signals, transactions, features, etc. SPI UVC development is focused on developing SPI master UVC and SPI slave UVC. SPI master and slave UVC are validated by connecting each other. This also involves developing scoreboard and checking for checking test case passing.


Protocol overview
SPI architecture
Signal Descriptions
SPI transactions
Multiple slaves
UVC architecture
UVC components
UVC types
Master, Slave
Active, Passive
UVC test scenario listing down
UVC component coding
Driver, Sequencer, Monitor, Coverage, Environment
Interface, transaction, Slave model, assertions
Testbench integration
Testcase coding
Simulations and waveform analysis
Functional coverage analysis
Assertion coding and analysis

Course videos

Unit 1 SPI PROTOCOL, SPI Controller RTL, SPI verification using Verilog 02:58:00
Unit 2 SPI UVC Development 02:15:40

Benefits of eLearning:

  • - Access to the Instructor - Ask questions to the Instructor who taught the course
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  • - Learn at Your Pace - VLSIGuru eLearning courses are self-paced, so you can proceed when you're ready

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