UART Protocol and UVC Development Training

About Course

UART Protocol training is focused on learning all the aspects of UART including architecture, signals, transactions, features, etc. UART UVC development is focused on developing UART master UVC and UART slave UVC. UART master and slave UVC are validated by connecting each other. This also involves developing scoreboard and checking for checking test case passing.


Protocol overview
UART architecture
Signal Descriptions
UART transactions
UVC architecture
UVC components
UVC types
Master, Slave
Active, Passive
UVC test scenario listing down
UVC component coding
Driver, Sequencer, Monitor, Coverage, Environment
Interface, transaction, Slave model, assertions
Testbench integration
Testcase coding
Simulations and waveform analysis
Functional coverage analysis
Assertion coding and analysis

Course videos

Lecture 1 UART Protocol training 03:00:15
Lecture 2 UART UVC Development 02:47:01
Lecture 3 UART Scoreboard and checker development 02:00:16
Lecture 4 UART sequence and testcase coding 02:00:16

Benefits of eLearning:

  • - Access to the Instructor - Ask questions to the Instructor who taught the course
  • - Available 24/7 - VLSIGuru eLearning courses are available when and where you need them
  • - Learn at Your Pace - VLSIGuru eLearning courses are self-paced, so you can proceed when you're ready

continue to register

Have an account ? Login Fast

Login to Continue

If you face any Issue Contact Administrator.