VLSI Training
DDR5 Protocol Training
DDR5 TrainingFunctional DescriptionDDR5 Pinout AssignmentsDDR5 AddressingReset and Initialization ProcedureMode RegistersCommand Description and Operation2-Cycle Command CancelMULTI-PURPOSE Command…
- 15 HoursCourse Duration
- 15 SessionsRecorded & Live
- 4.6/5Learner Rating
- 200+Enrolled Learners
Course Overview
- DDR5 Training
- Functional Description
- DDR5 Pinout Assignments
- DDR5 Addressing
- Reset and Initialization Procedure
- Mode Registers
- Command Description and Operation
- 2-Cycle Command Cancel
- MULTI-PURPOSE Command (MPC)
- 2N Mode
- CS Geardown Mode
- ACTIVATE Command
- PRECHARGE Command
- Burst Length, Type, and Order
- IO Features and Modes
- Programmable Preamble and Postamble
- Interamble
- On-Die ECC
- Write Operations
- READ Operations
- Temperature Sensor
- REFRESH Operation
- Self Refresh Operation
- Input Clock Frequency Change
- Power-Down Mode
- Maximum Power Saving Mode
- Connectivity Test Mode
- ZQ Calibration Commands
- Per-DRAM Addressability
- CS Training Mode
- CA Training Mode
- Write Leveling (WL) Training Mode
- Read Training Pattern
- Read Preamble Training Mode
- Post Package Repair
- Memory BIST Post Package Repair (mPPR)
- On-Die Termination
What You Will Learn
- Course OverviewDDR5 protocol training is focused on understanding of all the aspects of DDR5 including DDR5 ports, commands, timing diagrams, training sequences, post package repair, ODT etc.
Session-wise Content
15 sessions · 14h 44m- 1DDR5 evolution, DDR5 updates, architecture1h 13m
- 2DDR5 memory organization, 3D stacking, addressing, Pin out description46m
- 3DDR5 Truth table1h 14m
- 42N mode, Gear down mode, MPC, Burst transfer1h
- 5Power up initialization state diagram56m
- 6Mode register read, mode register fields, write, read timing diagrams43m
- 7DDR5 timing diagrams, TDQS, Preamble, Postamble, on-die ECC1h 27m
- 8Write operation, Write pattern, Read operation, Connectivity test mode, temparature sensor54m
- 9Refresh operation, PASR, Input clock frequency change47m
- 10Power down mode, MPSM, ZQ calibration51m
- 11CS training mode, CA training mode, VREFCS, VREFCA commands, VREFCS, CA, DQ training44m
- 12Write leveling, read training pattern57m
- 13DDR5 - DFE, Loopback, CRC, Post package repair, per-DRAM addressability1h 14m
- 14DFI - DDR PHY Interface1h
- 15LPDDR4 features58m
Your Instructor
S
Sreenivas Reddy
Founder, VLSIGuru
Benefits of eLearning?
- Access to the Instructor - Ask questions to the Instructor who taught the course
- Learn at Your Pace - VLSIGuru eLearning courses are self-paced, so you can proceed when you're ready
What Our Students Say
Frequently Asked Questions
- Course presentations for all topics
- Session notes
- Lab documents with detailed steps
- User guides
- Exposure to basic memory concepts like SRAM, FLash, etc
- Exposure to digital design concepts
Dedicated sessions planned to train student on Protocol specific TB component coding
- Each session of course is recorded, missed session videos will be shared
- Yes, You will have option to view the recorded videos of course for the sessions missed
- You will have option to repeat the course any time in next 1 year
- Yes, Course fee also includes support for doubt clarification sessions even after course completion
- You have option to mail you queries
- Option to meet in person to clarify doubts