TCL for VLSI flow automation training
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TCL for VLSI flow automation training
- Course Duration: 53 Hours
- 4.6 Star (Rating)
- 650+ (Student Enrolled till Now
About Course
Application Oriented TCL for Synopsys Tools
TCL training is for VLSI professionals and students who work on Synopsys tools like ICC/ICC2 Compiler, DFT Compiler, Design Compiler , Primetime. Training will enhance your scripting skills which increase your productivity while using Synopsys tools. Real time Projects/Assignments will be given to audience as well as driven by audience requirements.Explanation and Execution of all concepts, commands and scripts will done in ICC shell to connect to audience requirements. VPN will be given to audience for practice and execution of projects/assignments. Tools Used for TCL Scripting : ICC2, Primetime, Design Compiler
All the EDA tool flows from Synopsys, Cadence and Mentor Graphics use Tcl as the primary scripting interface for their flows. TCL as a single command language in all EDA tool flows ensures that a designer only needs to learn Tcl in order to work with all the flows.
TCL scripting is much sought after skill set for every VLSI engineer. Training will provide the detailed practical exposure on each aspect of project flow setup mostly focused on Physical Design, STA, and functional verification with multiple hands on examples.
| Unit Number | Topic | Duration (Mins) |
| 1 | TCL Cygwin usage basics | 20 |
| 2 | TCL TRAINING OVERVIEW, AGENDA | 20 |
| 3 | Introduction to TCL | 40 |
| 4 | How to run the TCL program | 58 |
| 5 | Formal syntax of the TCL | 50 |
| 6 | set, puts and gets commands | 36 |
| 7 | Escape characters | 56 |
| 8 | TCL Operators | 87 |
| 9 | TCL Control statements | 58 |
| 10 | TCL Control statements (if and for statements) | 63 |
| 11 | TCL Control statements (while statements) | 31 |
| 12 | TCL Control statements (switch and foreach statements) | 30 |
| 13 | TCL strings and its operators | 24 |
| 14 | Strings operators Conti... | 68 |
| 15 | Examples of Strings operators Conti... | 64 |
| 16 | Programs on TCL Strings operators | 55 |
| 17 | TCL Lists | 26 |
| 18 | Programs on TCL Lists | 55 |
| 19 | TCL special variables | 60 |
| 20 | Programs on TCL special variables | 30 |
| 21 | Programs on TCL special variables Conti... | 35 |
| 22 | TCL File handling operations | 54 |
| 23 | Programs on TCL File handling operations | 59 |
| 24 | Programs on TCL File handling operations Conti... | 56 |
| 25 | TCL Procedures and Programs on TCL Procedures | 82 |
| 26 | TCL Procedures and Programs on TCL Procedures Conti... | 50 |
| 27 | TCL Procedures and its parameters | 52 |
| 28 | Ses 11 P 2 TCL Arrays | 32 |
| 29 | TCL Associative Arrays | 47 |
| 30 | Programs on TCL Arrays | 33 |
| 31 | TCL Dictionary | 65 |
| 32 | TCL Regular expression | 48 |
| 33 | Programs on TCL Regular expression | 48 |
| 34 | Programs on TCL Regular expression Conti... | 46 |
| 35 | Programs on TCL Regular expression Conti... | 46 |
| 36 | TCL ADVANCED SES1 Tool Installation and Design Access | 77 |
| 37 | TCL ADVANCED SES2 ICC2 Commands Understanding Objects , class , attributes | 134 |
| 38 | TCL ADVANCED SES3 TCL program to find core area for any utilization | 107 |
| 39 | TCL ADVANCED SES4 TCL program to place ports at particular locations | 143 |
| 40 | TCL ADVANCED SES5 Multi votage design and TCL program to create voltage area | 136 |
| 41 | TCL ADVANCED SES 8 Automated TCL code to fix max_cap and max_trans | 85 |
| 42 | TCL ADVANCED SES 9 Report timing and TCL script on timing reports | 173 |
| 43 | TCL ADVANCED SES 6 TCL Prgram for padding to spread cells.mp4 | 58 |
| 44 | TCL ADVANCED SES 7 TCL Prgram for Upsizing driver and inserting buffer to driver pin of violated net to fix DR | 120 |
| 45 | TCL ADVANCED SES 10 TCL scripts for implementing Usefull skew method | 53 |
| 46 | TCL ADVANCED SES 11 TCL script for getting shorted nets and fixing it | 70 |
| 47 | TCL ADVANCED SES 12 TCL code to get open clock pins after CTS | 44 |
| 48 | TCL ADVANCED SES 13 Whether all clock pin has clock gating cells or not | 50 |
| 49 | TCL ADVANCED SES 14 Applying keepout margin around the cells to fix keepout margin | 29 |
| 50 | TCL ADVANCED SES 15 To get Bottle neck cells | 108 |
| 51 | TCL ADVANCED SES 16 Get slack values of neighbouring cells . This is helpful in IR drop fixing | 44 |
Curriculum
| Overview |
| Env Setup |
| Special Variables |
| Data Types |
| Variables |
| Operators |
| Decisions |
| Loops |
| Arrays, Strings, Lists, Dictionary |
| History and Redoing of commands |
| String Pattern Matching commands |
| Unit 1: File Operations |
| Lab 1: Scripts on file operations. |
| Unit 2 : Usage of redirect command |
| Lab 2 : Execution of redirect commands |
| Unit 3 : Control Flow, Math Functions |
| Lab 3 : Execution of Control Flow, Maths Functions. |
| Unit 4: Procedures |
| Lab 4 : Writing own Procedural commands. |
| Unit 5: Procedures with positional arguments |
| Lab 5: Writing own Procedures with positional arguments |
| Unit 6 : Procedures with non positional arguments (switch based procedures) |
| Lab 6 : Writing own Procedures with non positional arguments. |
| Unit 7: Object Classes and Design Objects |
| Lab 7 : Commands to handles design objects |
| Unit 8 : Collections |
| Lab 8 : Commands to handle Collections |
| Unit 9 : Design objects Collection and its attributes |
| Lab 9 : Scripts on collections and its attributes |
| Unit 10 : Linking design objects with another design objects. |
| Lab 10: Scripts on linking design objects with another design objects. |
| Unit 11 : Filtering applications on design objects. |
| Lab 11 : Scripts on filtering applications |
| Lab 12: Script to get gate count of full chip. |
| Lab 13: Script for macro placement. |
| Lab 14: Script for finding high fan out nets |
| Lab 15: Script on ECO fixing like inserting buffers on high fan out nets |
| Lab 16: Script on inserting antenna diodes to fix antenna violations. |
| Script to write customize pin placement. |
| Script to write TCL file to execute some set of command from the collection (it can be a file or variable). |
| Script to find shorted (nets having shorts) nets. |
| Script to improve the routing of bad nets. |
| Script to insert buffer to all endpoints having hold violations. |
| Script to resolve overlapping even after legalize placement. |
| Script for handling logs from different Synopsys tools. |
| Script to report endpoints and start points slack of top 1000 failing paths |
| Script to get a list of the register sinks for a clock |
| Script to return all the instance pins that are in timing path. |
| Script to report slack and difference between clock arrival time at launch and capture clocks. |
| Script to report logics between reg to reg path. This script can be modified for different path groups. |
| Script to find the number of logic levels(combinational) in a timing path or group of timing paths. |
| Script to report worst slack for all clock group. |
| Dedicated projects based on audience requirements |
| Assignments based on TCL flow automation for various aspects of VLSI backend flow. |
Benefits of eLearning?
- Access to the Instructor - Ask questions to the Instructor who taught the course
- Available 24/7 - VLSIGuru eLearning courses are available when and where you need them
- Learn at Your Pace - VLSIGuru eLearning courses are self-paced, so you can proceed when you're ready
Course Instructor
- Dedicated Trainer Accessible On Phone / Email / Whatsapp
- Trainer Exp: 15 Years
Course Highlights
- Mentor Support for doubt clarifications
- Product company focused questions
- 50+ hours of lectures
TESTIMONIALS
What Our Students Says About Inskill
To start up career in VLSI domain,
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Trainers and Mentors having wonderful teaching style where they clear the concepts and doubts from basics. Also, got placement support from institute. Study materials provided to us are well structured.
Thank you so much to Trainers , Mentors and Admins who supports me a lot. Once again,
I thank VLSI guru training institute for helping me to start my career in VLSI Domain
I have done functional verification for fresher and being professor at University i am looking for good syllabus content as well as complete project guidence. I am very much satisfied with both of these. Their syllabus cover entire verification cycle. I always get support for all my queries, i used to ask my problems or errors directly to Shrinivas sir and his response not only solve my queries but also boost my confidence. sometimes we used to ask very simple and silly things but he is very polite and humble, in fact for course with 6-7
months duration you need constant motivation and inspiration, take regular feedback and help us to crack interview. Weekend Lab session are very useful for candidates who used to work during week days. Placement support is very important and i am very proud (not egoistic) to say i havr been selected in 4 companies and even Shrinivas sir help me how to select among these companies based on my priorities and requirements. Thank you very much to Shrinivas Sir and Team.
I have attended the online live training from USA on Verification. The Online training along with the assignments and projects not only made me understand the concepts on Verilog, SV, UVM in depth but also helped extremely during my on-site interviews with Apple, Nvidia and Intel and I ended up getting a job at Intel as a Graphics Hardware Engineer currently working on Validation. I am glad that the VLSIGuru is providing the training on entire VLSI design flow at a very reasonable price. Highly recommended for the freshers who are looking to start their career in VLSI design in both front end or back end and for the working professionals who are looking to grow/promote to higher positions. 5 stars without a doubt ! Cheers !
I have taken training at VLSIGURU for Design and Verification course through online.
They have very experienced faculty with industrial knowledge.
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Every doubt has been clarified with patience and in detail.
Every session os recorded and can be accessed through their website when required.
The institute also provided hands-on experience with the required tools and provided online access as well.
VLSIGURU institute also provided lab support to solve and get experience with the tool and gain knowledge on core concepts.
Interview preparation sessions has also been conducted along with mock interviews and training sessions.
It is the best institute to gain knowledge in core domain with affordable prices.
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FAQ
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