Universal Memory Controller Functional Verification

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Universal Memory Controller Functional Verification

About Course

Universal Memory controller design support various types of memories like SRAM, SDRAM, Flash, ROM and Synchronous memory devices. It supports 8 chip selects with configurable memory sizes and timing behavior. This project provides student with detailed exposure to complete project flow starting from reading the specification till coverage report generation and regression analysis


Student will get exposure to regression setup, coverage analysis and scoreboard development. This project is also good for working professionals whose work is generally confined to limited aspects of verification flow and want to get quick hands on exposure to complete flow..

Demo Videos

Unit NumberTopicDuration (Mins)
1MEM_CTRL Session1188
2MEM_CTRL Session2152
3MEM_CTRL Session3173
4MEM_CTRL Session4200
5MEM_CTRL Session5139
6MEM_CTRL Session6182
7MEM_CTRL Session7190
8MEM_CTRL Session8105
Curriculum

Reading design specification
Understanding design architecture, sub blocks, register definitions, interfaces
Listing down features, scenarios
Develop testplan
Functional coverage point list down
Develop Testbench architecture
Testbench component coding and integration
Skeletal TB structure coding
Functional coding
Develop sanity testcases(smoke testcases)
Bringup testbench environment using sanity testcases
Develop rest of testbench components
Develop functional testcases
Setup regression using Python script
Verification closure
Debug regression failures
Functional, Code and assertion coverage analysis

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Course Instructor
  • Dedicated Trainer Accessible On Phone / Email / Whatsapp
  • Trainer Exp: 15 Years

Price - ₹7,000 + GST

₹7,800    (10% Off)

10 hours left to avail at this price

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