Universal Memory Controller Functional Verification
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Universal Memory Controller Functional Verification
- Course Duration: 19 Hours
- 4.6 Star (Rating)
- 200+ (Student Enrolled till Now)
About Course
Universal Memory controller design support various types of memories like SRAM, SDRAM, Flash, ROM and Synchronous memory devices. It supports 8 chip selects with configurable memory sizes and timing behavior. This project provides student with detailed exposure to complete project flow starting from reading the specification till coverage report generation and regression analysis
Student will get exposure to regression setup, coverage analysis and scoreboard development. This project is also good for working professionals whose work is generally confined to limited aspects of verification flow and want to get quick hands on exposure to complete flow..
Demo Videos
| Sr No. | Title | Video Duration |
| 1 | DV course labs guidance | 40:10 |
| 2 | Functional Verification Overview, Types of Verification, Why Choose a Memory Controller?, What is a Memory Controller? | 40:00 |
| 3 | Understanding Memory Basics | 48:10 |
| 4 | Memory Controller Requirements, Memory Controller Architecture, Memory Controller Feature | 34:30 |
| 5 | Memory Controller Components Understanding, Memory Controller Operation, Basic Coding of wb_tx Class | 01:05:52 |
| 6 | Memory Organization and timing diagram understanding for different memorys with their register understandingPART - 1 | 37:18 |
| 7 | Memory Organization and timing diagram understanding for different memorys with their register understandingPART - 2 | 24:10 |
| 8 | Dynamic Bus Sizing, Memory Burst Cycles, Read Modify Write Cycles, Error Signalling, Power On Configuration, Power Down Mode, Memory Bus arbitration, Core Registers, Wb_interface IO s and Memory_Interface IO s | 33:15 |
| 9 | Wiring Examples, Memory Controller Spec Document Walkthrough (Understanding How to Read Any Design Spec | 32:38 |
| 10 | estplan Development, Functional Coverage Point Listing | 24:19 |
| 11 | Revision | 09:24 |
| 12 | Testbench Development Understanding, Testbench Coding Understanding, Wb_Protocol Understanding, Tb Directory Structure, Starting with Memory Controller Tb Coding | 01:13:59 |
| 13 | MC Env Coding, Sanity Testcase Coding (reg_wr_rd_test) – Define wb_tx Class, wb_gen Class | 52:37 |
| 14 | Defining wb_bfm Class to Drive TX to Design, mem_common Class Coding, Connecting DUT in TB, Waveform Debug | 38:02 |
| 15 | Improving the Code by Using Tasks and Functions, Waveform Debug and Debug Approaches | 01:23:30 |
| 16 | sanity testcase coding | 10:20 |
| 17 | Connecting Memory (SRAM) in TB Using mem_interface Signals, test_sram_sanity Test, Test Waveform Debug | 01:46:19 |
| 18 | SDRAM Connection to TB, test_sdram_access Test, Test Waveform Debug | 01:51:10 |
| 19 | Flash Connection to TB, test_flash_test | 28:30 |
| 20 | wb_monitor class, wb_coverage class coding | 00:38 |
| 21 | MC_Ref Model Algorithm Understanding and Coding, MC_Reg Model Coding, Introducing File Operations to Make TB Debug Easier, Debug Test Failures and Updating TB Accordingly, mem_mon and Coverage Coding | 02:25 |
| 22 | mem_mon and MC_Ref Code Understanding, Updating mem_mon for Different Memory Models, Flash Access Test Case Debug, Coverage Analysis – Functional Coverage | 03:11:16 |
| 23 | Functional testcases accessing different memories Test case debug Power down SDRAM access concepts | 01:44:23 |
Fee Structure
Curriculum
| Reading design specification |
| Understanding design architecture, sub blocks, register definitions, interfaces |
| Listing down features, scenarios |
| Develop testplan |
| Functional coverage point list down |
| Develop Testbench architecture |
| Testbench component coding and integration |
| Skeletal TB structure coding |
| Functional coding |
| Develop sanity testcases(smoke testcases) |
| Bringup testbench environment using sanity testcases |
| Develop rest of testbench components |
| Develop functional testcases |
| Setup regression using Python script |
| Verification closure |
| Debug regression failures |
| Functional, Code and assertion coverage analysis |
Benefits of eLearning?
- Access to the Instructor - Ask questions to the Instructor who taught the course
- Available 24/7 - VLSIGuru eLearning courses are available when and where you need them
- Learn at Your Pace - VLSIGuru eLearning courses are self-paced, so you can proceed when you're ready
Course Instructor
- Dedicated Trainer Accessible On Phone / Email / Whatsapp
- Trainer Exp: 15 Years
Course Highlights
- 1-1 mentor support
- Mentor guidance support for assignments
- Multiple mock interviews
- Dedicated live support sessions over weekends
TESTIMONIALS
What Our Students Says About Inskill
To start up career in VLSI domain,
Inskill is best Platform with both Offline and Online flexibility.
Trainers and Mentors having wonderful teaching style where they clear the concepts and doubts from basics. Also, got placement support from institute. Study materials provided to us are well structured.
Thank you so much to Trainers , Mentors and Admins who supports me a lot. Once again,
I thank VLSI guru training institute for helping me to start my career in VLSI Domain.
I enrolled in Frontend Verification training course, firstly about the syllabus, they teach a lot of things I have compared to other classes no-one teaches so many things as VLSIGURU has taught me. The live lectures happen on regular basis which is a combination of theory as well as practicals. The mentors are just awesome they have a very good knowledge about the modules and clear our every doubts.
The admins are very much co-operative and understandable and help you throughout the course.
The concepts taught are in a very simplified manner and every lecture is recorded.
Very much satisfied will recommend to any VLSI enthusiast
I have taken training at VLSIGURU for Design and functional verification course through online,
where i got more practical knowledge then usual syllabuses.
I was very much satisfied learning at this training institute.
Especially with the way of teaching, they gave individual attention for each and every students and i had a very good experience
which brought me some confidence for facing any trouble to learn any topics they clarify each stages in training period.
every sessions recorded and can be accessed through their website when required.
The institute also provided hands-on experience with the required tools and provide online access as well.
This institute has highly well experienced real time working professionals as trainers.
thanks to VLSIGURU institute.
VLSIGURU training institute is one of the best training institute for VLSI domain.
They offer best courses for a very low and affordable prices.
I took e-learning courses, the course content and materials are well planned according to the industry requirements.
Their lectures are very detailed and cover all the concepts.
The projects and assignments they give are helpful in cracking a job.
The admin teams is very supportive all the time. I would definitely recommend to others
FAQ
- Course presentations for all topics
- Session notes
- Lab documents with detailed steps
- User guides
- Exposure to standard bus protocols
- Exposure to Testbench component coding using SystemVerilog
- Each session of course is recorded, missed session videos will be shared
- Yes, You will have option to view the recorded videos of course for the sessions missed
- You will have option to repeat the course any time in next 1 year
- Yes, Course fee also includes support for doubt clarification sessions even after course completion
- You have option to mail you queries
- Option to meet in person to clarify doubts