Power Integrity and IR Drop Analysis Training
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Power Integrity and IR Drop Analysis Training
- Course Duration: 43 Hours
- 4.6 Star (Rating)
- 2000+ (Student Enrolled till Now)
About Course
Ansys RedHawk training is a 8 weeks training program targeted for standard power noise and reliability sign-off solution for SOC designs. RedHawk helps create high-performance SoCs which are power efficient and reliable for electromigration, thermal and electrostatic discharge issues. RedHawk is the sign-off solution for all the foundries. RedHawk’s advanced Distributed Machine Processing (DMP) enables significantly higher capacity and better performance for full-chip IR/dynamic voltage drop, power/signal electromigration (EM) and electrostatic discharge (ESD) analyses.
RedHawk training will focus on all the aspects Power integrity, and IR drop analysis.
Demo Videos
Demo Videos
Curriculum
| Overview of Redhawk and Basics of Power , EM, IR.(Theory : 3 hrs) |
| Average Power Calculation and Static Analysis.(Theory : 3 hrs) |
| IP Modelling Techniques in Redhawk (Theory : 3hrs) |
| APL Characterisation(3hrs) |
| Dynamic Analysis Vectorless Single Cycle and Multi Cycle Flows (Theory 3 hrs) |
| Dynamic Vectored Analysis(3 hrs) |
| Redhawk Signal EM(3hrs) |
| Low Power Design Analysis(3 hrs) |
| Setup of Redhawk (3hrs) |
| Day 1: |
| Overview of Redhawk. |
| Labs: Understanding of Input files of Redhawk, Setting up of Redhawk Env. |
| Day 2: |
| Basics of Power, EM, IR. |
| Data Preparation of Redhawk- Generation of Collaterals from ICC |
| Understanding Volcano Design. |
| IP Modelling Techniques. |
| Labs: |
| Analyzing of APL using utilities Aqua and ACE. |
| Sanity Checks of all Inputs Colleterals. |
| Day 3: |
| Grid Weakness Checks, Resistance Extraction. |
| Labs: |
| Performing PG Resistance Analysis - effective resistance of Instances, Pin Path Resistance Checks |
| Missing Vias Checks, |
| Analyzing Shorts, |
| Disconnected Instances, |
| Connectivity Checks. |
| Day 4 & 5: |
| Average Power Calculation, |
| Static Analysis Theory, |
| Redhawk Static IR/EM Flow |
| Labs: |
| Setting Up of GSR for Static Run. |
| Creation of Command run file. |
| Power Calculation in Static Analysis using Toggle rate. |
| Power Calculation in Static Analysis using BPFS. |
| Doing experiments with BPFS. |
| Exploration of Redhawk TCL Commands for advanced Debugging of IR Drop. |
| Creation of Custom lib’s for Missing PG Arcs. |
| Exploration of Redhawk Explorer. |
| Exploration of Power Maps. |
| Package and PAD Constraints. |
| Results Exploration and Debugging. |
| Debugging EM Violations. |
| Analyzing Hot spots. |
| Analysis Battery Currents and Demands Currents. |
| Day 6 & 7. |
| Dynamic Vectorless Analysis |
| Redhawk Dynamic Flow |
| Labs: |
| Setting Up of GSR for Static Run. |
| Creation of Command run file. |
| Plotting Instance current |
| Min, Max, Avg DVD in Timing Window and min DVD in Whole Simulation Cycle. |
| Analysis of Switches and its equivalent reports |
| Wire IR Drops |
| Exploration of DVD Histograms. |
| Plotting Instance Voltage Waveform. |
| Plotting Switching Histograms. |
| Analyzing Switching events |
| Decap Density Maps |
| Dynamic Voltage Drop Movie. |
| Analysis Dynamic Reports |
| Design Weakness Checks |
| Pad Current Checks |
| Decap Efficiency Checks |
| Simultaneous Switching Checks |
| Frequency Domain based Demand Current Checks |
| Voltage Domain based Demand Current Checks |
| Cross Probing Violations in Redhawk GUI |
| Hotspot Analysis Summary |
| DVD Check – Instance Level Debug |
| Short Path Tracing of Instances |
| Power EM Checks |
| Day 8: |
| Multicycle Vectorless Analysis |
| Labs: |
| Correlation between Single Cycle and Multicycle analysis |
| Cycle based Switching |
| All labs on Dynamic Vectorless will be applicable to Multicycle |
| Running Redhawk Power IR/EM on Volcano or ORCA_TOP |
| Running Redhawk on Power IR/EM Ansys Design. |
| Assignments |
| Labs: |
| Static EM/IR Analysis.(6hrs) |
| Dynamic EM/IR Vectorless Analysis Single Cycle.(6hrs) |
| Dynamic EM/IR Vectorless Analysis Multi Cycle.(6 hrs) |
| Dynamic Vectored Analysis Worst Power Cycle.(6hrs) |
| Dynamic Vectored Analysis Worst dpdt Cycle.(6 hrs) |
| Signal EM Analysis.(3hrs) |
| Low Power Design Analysis(6 hrs) |
Benefits of eLearning?
- Access to the Instructor - Ask questions to the Instructor who taught the course
- Available 24/7 - VLSIGuru eLearning courses are available when and where you need them
- Learn at Your Pace - VLSIGuru eLearning courses are self-paced, so you can proceed when you're ready
Course Instructor
- Dedicated Trainer Accessible On Phone / Email / Whatsapp
- Trainer Exp: 15 Years
Price - ₹10,000 + GST
₹12,500 (20% Off)
10 hours left to avail at this price
Course Highlights
- Mentor Support for doubt clarifications
- Product company focused questions
- 49 hours of lectures
TESTIMONIALS
What Our Students Says About Inskill
Best Institute for VLSI DOMAIN. The Faculty is friendly.
In videos Srinivas Sir is the best in teaching.
The Lab Session are very very Good They will clear your all the doubts.
They Conduct PPT presentations Session for students for real experience and
Mock iAnd thanks to srinivas Reddy sir and monahar sir to solve my issuenterviews
And thanks to srinivas Reddy sir and monahar sir to solve my issue.
I completed Physical Design course in the institute and I would say VLSIGURU is the best institute at Bangalore. They have taught each concepts of PD in details and every faculty member is extremely supportive, whenever I had doubts they had it cleared for me which I liked the most. Also LAB classes are very good, they give tool access and you can explore on the tools like an adventurer. One of the greatest boon VLSIGURU has is they keep the live sessions recorded so that if anyone need to revisit the concepts again they can re-watch it.
I enrolled in Frontend Verification training course, firstly about the syllabus, they teach a lot of things I have compared to other classes no-one teaches so many things as VLSIGURU has taught me. The live lectures happen on regular basis which is a combination of theory as well as practicals. The mentors are just awesome they have a very good knowledge about the modules and clear our every doubts.
The admins are very much co-operative and understandable and help you throughout the course.
The concepts taught are in a very simplified manner and every lecture is recorded.
Very much satisfied will recommend to any VLSI enthusiast.
I am very thankful to Owner of inskill Sreenivasa Reddy sir which have Excellent teaching skill and more powerful industry experience and good placement of these institute.
All mentor and trainer well experienced.
Verilog , system verilog ,UVM and project are in really depth with Lab and assignment session .
I appreciate efforts put up by all inskill team and specially appreciate to Sreenivasa Reddy sir.
I strongly recommend this course for students who want to start their journey in vlsi domain.
FAQ
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