UVM register model(RAL) development training is a 21 hours e-learning course focused on all the aspects of register model development, integration, testcase and checker implementation based on register model. USB2.0 core used as reference design for developing register model, integration and testcase development.
Register model training include all the aspects of scripting for register model development, front door access, back door access, testcase development, scoreboard logic etc.
Unit Number | Topic | Duration (Mins) |
1 | Register model overview, Base classes | 175 |
2 | Register model development, integration | 110 |
3 | Ethernet MAC register model development, integration and testcase coding | 180 |
4 | Register write read testcase debug, predict method | 154 |
5 | SPI Master Core Simulation bring up | 15 |
6 | SPI Core TB Overview, Register sequences description | 62 |
7 | Register class methods, simulations | 149 |
8 | Functional coverage in register model | 154 |
9 | Register build-in sequences for register and memory checking | 74 |
10 | Creating tests using build-in sequences | 112 |
11 | USB RAL Model coding | 62 |
12 | Scoreboard implementation for status register checking | 7 |
TESTIMONIALS
I have done functional verification for fresher and being professor at University i am looking for good syllabus content as well as complete project guidence. I am very much satisfied with both of these. Their syllabus cover entire verification cycle. I always get support for all my queries, i used to ask my problems or errors directly to Shrinivas sir and his response not only solve my queries but also boost my confidence. sometimes we used to ask very simple and silly things but he is very polite and humble, in fact for course with 6-7
jagrat mehta
months duration you need constant motivation and inspiration, take regular feedback and help us to crack interview. Weekend Lab session are very useful for candidates who used to work during week days. Placement support is very important and i am very proud (not egoistic) to say i havr been selected in 4 companies and even Shrinivas sir help me how to select among these companies based on my priorities and requirements. Thank you very much to Shrinivas Sir and Team.
I joined this institute in summer after I was admissioned into IIT MADRAS, some of my seniors done training in this institute so they suggested me. When I was joining this institute my aim was to learn hardware language so that at the time of placements I should have some extra skills to stand out from the crowd and when the placement came I was so clear about my conceepts and the interviewers got impressed..they provided training live and I was able to clear my doubts and it also helped in courses in IIT which was a hectic thing for others.
The best thing about the institute is that the head of the institute teaches us one to one and make everything a cakewalk.
To be honest I didn't have any prior coding experience before
I am placed in Analog Devices Inclusive at very handsome package on Day 1 placements .
Thanks for the support.
I recently completed the Functional Verification course at VLSIGuru, and I must say it was an exceptional training experience.
The course content was comprehensive, covering all essential aspects of functional verification.
The instructors were highly knowledgeable and provided clear explanations,making complex concepts easy to understand.
The practical hands-on exercises and real-world examples greatly enhanced my learning and problem-solving skills.
The course structure was well-organized, allowing for a smooth progression from fundamentals to advanced topics.
Overall, VLSIGuru's Functional Verification course has equipped me with the necessary skills and confidence to excel in the field.
Highly recommended!
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